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APPLICATIONS INFORMATION
associated with the output capacitors and can be
determined by
To fine-tune the compensation, it is necessary to
physically measure the frequency response us-
ing a network analyzer.
f Z(ESR) =
1
2 π C OUT R ESR
Gain
Crossover frequency of 20kHz is a sound first
try if low ESR tantalum capacitors or poscaps
are used at the output. The next step is to calcu-
late the complex conjugate poles contributed by
the LC output filter,
-20db/dec
-40db/dec
f P(LC) =
1
2 π√ LC OUT
Loop
-20db/dec
f
The open loop gain of the whole system can be
divided into the gain of the error amplifier,
PWM modulator, buck converter, and feedback
-20db/dec
resistor divider. In order to crossover at the
selected frequency fco, the gain of the error
amplifier has to compensate for the attenuation
caused by the rest of the loop at this frequency.
In the RC network shown in Figure 4, the product
of R1 and the error amplifier transconductance
Error Amplifier
-20db/dec
f
determines this gain. Therefore, R1 can be deter-
mined from the following equation that takes
into account the typical error amplifier
transconductance, reference voltage and PWM
ramp built into the SP6121.
Figure 5. Frequency response of a stable system and its
error amplifier.
Overcurrent Protection
R1 =
975V OUT f CO f Z(ESR )
V IN f P(LC)2
Over current protection on the SP6121 is imple-
mented through detection of an excess voltage
In Figure 4, R1 and C1 provides a zero f Z1 which
needs to be placed at or below f P(LC) . If f Z1 is
made equal to f P(LC) for convenience, the value
of C1 can be calculated as
condition across the high side PMOS switch
during conduction. This is typically referred to
as high side R DS(ON) detection. By using the
R DS(ON) of Q1 to measure the output current, the
current limit circuit eliminates the sense resistor
C1 =
1
2 π f P(LC) R 1
that would otherwise be required and the corre-
sponding loss associated with it. This improves
the overall efficiency and reduces the number of
C2 =
The optional C2 generates a pole f P1 with R1 to
cut down high frequency noise for reliable op-
eration. This pole should be placed one decade
higher than the crossover frequency to avoid
erosion of phase margin. Therefore, the value of
the C2 can be derived from
1
20 π f CO R 1
Figure 5 illustrates the overall loop frequency
response and frequency of each pole and zero.
components in the power path benefiting size
and cost. R DS(ON) sensing is by default inaccu-
rate and is primarily meant to protect the power
supply during a fault condition. The overcurrent
trip point will vary from unit to unit as the
R DS(ON) of Q1 varies. The SP6121 provides a
built-in 160mV threshold between the I SET and
I SENSE pins. If a current limit threshold in excess
of 160mV is required, an external programming
resistor, R SET can be added between I SET pin and
V IN as shown in Figure 6.
Date: 11/29/04
SP6121 Low Voltage, Synchronous Step Down PWM Controller
12
? Copyright 2004 Sipex Corporation
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